Keynote Speakers

Keynote 1: 28 October, 2021 from 11.00 A.M to 12.00 P.M.

Speaker: Dr. A Unnikrishnan

About the speaker: Dr. A Unnikrishnan graduated from REC (Calicut), India in Electrical Engineering(1975), completed his M.Tech from IIT, Kanpur in Electrical Engineering(1978)  and Ph.D from IISc, Bangalore in “Image Data Structures”(1988). He served as Associate Director, Naval Physical and Oceanographic Laboratory (NPOL), Kochi, which is a premiere Laboratory of Defence Research and Development Organisation and Principal of Rajagiri School of Engineering and Technology, Cochin. His field of interests include Sonar Signal Processing, Image Processing and Soft Computing. He has authored about hundred National and International Journal and Conference Papers. He is a Fellow of IETE & IEI, India and guided PhD students in CUSAT, IISC, Defence Institute of Armament Technology. His contributions were crucial in  implementation in NPOL Sonar systems, Integrated Coastal Surveillance System. He also served as member of the Naval Research board panel, second in command at NPOL, member of Board of directors, Keltron, Trivandrum.


Abstract of the Talk:

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Keynote 2: 29 October 2021 from 9.30 A.M to 10.30 A.M.

Speaker: Dr. Suresh Balanethiram

About the speaker:

Dr. Suresh Balanethiram is an Assistant Professor in the Department of Electronics and Communication Engineering at National Institute of Technology Puducherry since September 2021. Prior to joining NIT Puducherry, he was an Assistant Professor in the ECE department at IIIT Tiruchirappalli from November 2019. He obtained his Ph.D. in the area of Microelectronics from IIT Madras in 2017. During 2017, he was a Postdoctoral Fellow at IMS laboratory, University of Bordeaux, France. There he worked on on-wafer characterization and compact modeling of high-speed semiconductor devices with emphasis on electrothermal heating, in collaboration with STMicroelectronics. During 2018-19, he worked as a Senior Project Officer at IIT Madras on ISRO funded project to develop BiCMOS technology in India, in collaboration with Semi-Conductor Lab, Govt. of India. His current research interests include compact modeling of semiconductor devices, thermally aware semiconductor device design, and neuromorphic computing. He has more than 20 publications in IEEE journals and conferences related to electron devices and circuits.

Title: “Electrothermal Modeling of Semiconductor Devices”

Abstract of the Talk:

Today’s semiconductor device design aims for decent power gain at hundreds of GHz,
demanding the device to operate at high current densities thereby leading to significant self-heating. The heat generated, when not conducted away effectively, becomes a serious concern for the device performance. Scaling driven technology innovations in modern devices, such as trench isolations, confine the heat flow volume resulting in increased operating temperature. First, one should accurately incorporate the electrothermal heating in the compact modeling framework for reliable SPICE simulation. It is challenging because the heat source corresponding to the operating temperature is deep inside silicon, below all the metal layers. Hence, it is not possible to measure the temperature accurately by experiments. Therefore, it is equally important to extract the operating temperature of the device to develop the model. This talk will focus on the extraction and compact modeling techniques to obtain the operating temperature in silicon-germanium heterojunction bipolar transistors (SiGe HBTs) under static and dynamic operating conditions. Some of my recent works on thermal coupling due to multiple heat sources in close proximity and compact modeling of resistive memories for neuromorphic applications will also be highlighted.

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